By: Mark Thompson08.19.2019
In this column I will talk more about Co-planar structures and unique reference plane scenarios as they relate to PCB fabrication.
By: Mark Thompson06.10.2019
Today we will be talking about Controlled Impedance structures both from the layout side and the simulation side.
By: Mark Thompson05.06.2019
Today's article is about demystifying the reason for via's, via fabrication and how to make it work for your project.
By: Mark Thompson01.07.2019
Column about eliminating confusion that creates remakes, both from the end user/designer and the fabrication house.
By: Mark Thompson08.27.2018
This month I'm writing once again about what makes up a great incoming dataset for PCB fabrication.
By: Mark Thompson07.16.2018
10 things to remember before sending out a Fab Package. In this column Mark will attempt to help streamline the design cycle through fabrication. Following his tips will minimize the need for future revisions and ensure you get quality boards on time.
By: Mark Thompson06.11.2018
Now, more than ever we need to pay special attention to our customers’ desires and idiosyncrasies. This is key, as customer requests play a pivotal role in providing the customer the exact product they are looking for.
By: Mark Thompson03.26.2018
One of the biggest issues PCB fabricators face is the completeness of the data output package received from customers on a new part. In this column I am going to present what is needed, from a fabricator’s perspective, for a good output package and why.
By: Mark Thompson07.17.2017
In this column, Mark Thompson will be discussing: Design for Profitability - Avoiding fabrication related issues and minimizing costly revisions.
By: Mark Thompson12.01.2016
In this column, Mark Thompson will be discussing VIA's. From their traditional use to more un-conventional uses, the VIA has gone through some changes over the years.
By: Mark Thompson10.03.2016
Today's trace and space geometries vs. soldermask and surface finish.
By: Mark Thompson09.10.2015
Speeding up the Design Cycle, by our Engineer Mark Thompson!
By: Kelly Dack08.05.2015
An open blog post to PCB designers who have never ordered via fill for their PCB designs. As well as a few simple tips on incorporating Via Fill in your design.
By: Website Admin07.28.2015
Q&A Session discussing strategies for improving the PCB procurement process with Barry Matties of I-Connect007 and Russ Adams of Prototron Circuits.
By: Mark Thompson04.01.2014
Keep them on the Inside - Why Fabricators prefer Impedance Lines on Internal Layers.
By: Mark Thompson03.03.2014
"Things to review before release" Series. This week we will discuss material callouts and notes.
By: Mark Thompson01.27.2014
This week we'll go through what a board fabricator needs from an output CAD package briefly and talk about what edits are done at the manufacturing stage
By: Mark Thompson01.13.2014
Part 1 of Understanding the CAM Process Series begins with clarifying what a typical Fab shop CAM Department can and cannot do.
By: Mark Thompson12.09.2013
This week: I will be talking about various surface finishes and solder mask issues that can arise due to those surface finishes.
By: Mark Thompson11.25.2013
This Week: I will discuss the importance of informing your fabricator of your desired impedance end results.
By: Mark Thompson11.18.2013
This Week: We will focus on common artwork issues for RF and high frequency designs.
By: Mark Thompson11.11.2013
This Week: Clarify copper weight intentions
By: Mark Thompson11.04.2013
This weeks 'Standard Manufacturing Edits Revealed' will cover plated edge features.
By: Mark Thompson10.28.2013
This weeks 'Standard Manufacturing Edits Revealed' will cover constraints for scored jobs.
By: Mark Thompson10.21.2013
This weeks 'Standard Manufacturing Edits Revealed' is about Thermal Relief Edits.
By: Mark Thompson10.07.2013
In this post I will discuss the differences between a '1 up compare' and a 'Net-list compare'.
By: Mark Thompson09.30.2013
What is a net-list used for in a fabrication environment?
By: Mark Thompson09.23.2013
In this short post I will talk about broadside coupled impedance structures.
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